AI-Native Analog IC Design Platform

From spec to
silicon,
at the speed
of language.

Think it. Type it. Tape it.
Revolutionizing analog chip design with AI.

Request Demo Our Thesis ↓
The Problem

Analog design is hard.
Vanishingly few people can do it.

Unlike digital, which has been largely automated for decades, analog IC design remains a manual craft — demanding years of specialist intuition. The world is running out of analog designers just as demand accelerates.

Continuous · Infinite resolution
Analog Signal

Voltage varies continuously. Every point on the scale is a valid, distinct value — infinite resolution, but hard to design.

Bright
Dim
Opacity
Voltage: 0.000V
Resolution: ∞ bits
VS
Discrete · 5 fixed states
Digital Signal

Only discrete states exist. 3 bits encode 5 fixed levels — simple to automate, but resolution is bounded by bit-depth.

Binary: —
Why Analog

Where analog has
no substitute.

The physical world is analog. Wherever circuits must interface with reality — signals, power, sensors, RF — analog wins on efficiency and fidelity by fundamental physics.

RF & Wireless
Every 5G basestation and Wi-Fi chip relies on analog LNAs, mixers, and VCOs to process GHz-range signals at sub-milliwatt power. No digital equivalent exists.
Power Management
LDO regulators and DC-DC converters keep digital logic alive at efficiencies above 95%. Their analog feedback loops respond in nanoseconds.
Sensing & ADCs
Biosensors, MEMS microphones, and precision amplifiers extract microvolt signals from the environment — dynamic range no digital chain can match.
High-Speed I/O
At 112 Gbps and beyond, signal integrity is a physical, analog problem. CTLE and DFE equalisers are analog circuits inside every data-centre interconnect.
The Design Gap
Digital design was transformed by synthesis and place-and-route in the 1980s. Analog never got that revolution — designers still size transistors by hand, navigating noise, matching, and layout parasitics invisible to digital abstraction.
The Unprecedented Opportunity Now

From prompt to
tapeout-ready file.

The automation of analog chip design has gone from impossible to inevitable. AI can now learn human design intuition, dramatically increase throughput, and dismantle one of hardware's most stubborn bottlenecks. Samurai is leading that revolution — starting with schematics.

Samurai is the Cursor moment for analog — bringing the same automation leap to software engineering, fuelled by AI, to analog chip design.
01
Describe your spec
Input target parameters — gain, bandwidth, supply voltage, topology — in plain English or YAML.
02
LLM synthesizes the schematic
Our model generates a hierarchical netlist with component sizing, bias networks, and feedback paths — trained on millions of verified analog circuits.
03
Automated simulation
Cloud SPICE runs AC, DC, and transient sweeps. The model iterates until specs converge across process corners and Monte Carlo.
04
GDSII export
Layout is placed and routed with DRC/LVS clean guarantee. Export directly to your fab's PDK portal, ready for tapeout.
The Team

World-class training meets years of domain expertise.

Britain has been at the heart of chip design since its earliest days. We're proud to be building its future here too. The founding team sets off with Oxford and Cambridge foundations, forty years of hands-on expertise, and a vision to unlock what analog design has never before been able to achieve.

Early Access