AI-Native Analog IC Design

The copilot for
analog designers.

Unlock 10x analog IC design capability by
bridging engineering intuition with machine intelligence.

Why Now

Analog has been the bottleneck for ASICs.

10% analog chip area takes 90% design time.
Digital design was transformed by synthesis in the 1980s, but analog never got its revolution due to its perceived incomputability.

AI is the opportunity to change that.

The Product

An AI-native analog
thinking partner.

Describe the block you need in natural language.
Samurai returns a schematic — sized, simulated, and verified in SPICE.

7x Faster Schematics

Slash design generation time from legacy workflows.

80% Lower Engineering Overhead

Cut costly manual iteration loops and reallocate senior engineering talent to core innovation.

20% Cost Savings

Achieve same target output with smaller teams through efficient, reliable AI-assisted workflows.

The Samurai app: an LDO regulator specified as 'LDO regulator · conventional_PMOS · 180nm CMOS', the designer agent's iteration log resolving circuit issues, and the generated schematic rendered in the right panel with net-level highlighting. — Design shown: an LDO regulator on 180 nm CMOS, from a real Samurai session — spec in, the designer agent iterating on the circuit, and the schematic rendered live with net-level inspection and a downloadable design bundle.

How It Works

Intent in,
designs out.

Domain-aware Foundation

Feed your spec to a pre-contextualized analog knowledge engine.

AI-assisted Iteration

Explore and evaluate design concepts instantly with AI.

Complete Design Package

Receive design bundles with full deliberation histories and design documentation.
All set for bug-fixing or future alterations.

Request a Demo

Get in touch.

Tell us a little about you and we'll set up a walkthrough.

The copilot foranalog designers.

Analog has been the bottleneck for ASICs.

An AI-native analogthinking partner.

Intent in,designs out.